Chip with Secure Encryption to Bolster Fight against Hackers

The design also incorporates a purpose-designed hardware accelerator. It not only supports lattice-based post-quantum cryptography algorithms such as Kyber, but could also work with the SIKE algorithm, which requires much more computing power. According to the team, the chip developed at TUM could implement SIKE 21 times faster than chips using only software-based encryption. SIKE is seen as the most promising alternative if the time comes when lattice-based approaches are no longer secure. Precautions of this kind make sense in applications where chips will be used for extended periods.

Hardware Trojans Evade Post-Quantum Cryptography
Another potential threat, alongside the rise in conventional attacks, is posed by hardware trojans. Computer chips are generally produced according to companies’ specifications and made in specialized factories. If attackers succeed in planting trojan circuitry in the chip design before or during the manufacturing stage, this could have disastrous consequences. As in the case of external hacker attacks, entire factories could be shut down or production secrets stolen. What’s more: Trojans built into the hardware can evade post-quantum cryptography.

“We still know very little about how hardware trojans are used by real attackers,” explains Georg Sigl. “To develop protective measures, we need to think like an attacker and try to develop and conceal our own trojans. In our post-quantum chip we have therefore developed and installed four hardware trojans, each of which works in an entirely different way.”

Chip to Be Tested and Then Dismantled
Over the coming months, Prof. Sigl and his team will intensively test the chip’s cryptography capabilities and functionality and the detectability of the hardware trojans. The chip will then be destroyed – for research purposes. In a complex process, the circuit pathways will be shaved off incrementally while photographing each successive layer. The goal is to try out new machine learning methods developed at Prof. Sigl’s chair for reconstructing the precise functions of chips even when no documentation is available. “These reconstructions can help to detect chip components that perform functions unrelated to the chip’s actual tasks and which may have been smuggled into the design,” says Georg Sigl. “Processes like ours could become the standard for taking random samples in large orders of chips.  Combined with effective post-quantum cryptography, this could help us to make hardware more secure – in industrial facilities as well as in cars.”

Read more in:

·  Fritzmann, T., Sigl, G., & Sepúlveda, J. RISQ-V: Tightly Coupled RISC-V Accelerators for Post-Quantum Cryptography. IACR Transactions on Cryptographic Hardware and Embedded Systems, 2020(4), 239-280. DOI: 10.13154/tches.v2020.i4.239-280

·  Roy, D. B., Fritzmann, T., Sigl G. 2020. Efficient hardware/software co-design for post-quantum crypto algorithm SIKE on ARM and RISC-V based microcontrollers. In Proceedings of the 39th International Conference on Computer-Aided Design (ICCAD ‘20), Article 35, 1–9. DOI:10.1145/3400302.3415728

·  Hepp, A., Sigl G. Tapeout of a RISC-V crypto chip with hardware trojans: a case-study on trojan design and pre-silicon detectability. In Proceedings of the 18th ACM International Conference on Computing Frontiers (CF ‘21).213–220. DOI: 10.1145/3457388.3458869