CYBERSECURITYThinking Like a Cyberattacker to Protect User Data

Published 23 September 2022

A component of computer processors that connects different parts of the chip can be exploited by malicious agents who seek to steal secret information from programs running on the computer. Researchers develop defense mechanisms against attacks targeting interconnection of chips in computers.

A component of computer processors that connects different parts of the chip can be exploited by malicious agents who seek to steal secret information from programs running on the computer, MIT researchers have found.

Modern computer processors contain many computing units, called cores, which share the same hardware resources. The on-chip interconnect is the component that enables these cores to communicate with each other. But when programs on multiple cores run simultaneously, there is a chance they can delay one another when they use the interconnect to send data across the chip at the same time.

By monitoring and measuring these delays, a malicious agent could conduct what is known as a “side-channel attack” and reconstruct secret information that is stored in a program, such as a cryptographic key or password. Senior author Mengjia Yan explains, “An intuitive way to understand interconnect side-channel attacks is to think of the mesh interconnect as roads carrying cars from multiple directions. The cars [interconnect packets] can enter and exit the interconnect at different crossings. When traffic flows overlap, they may slow each other down and cause contention, which can be used to infer the victim’s traffic status and then the victim’s secret.”

In work funded in part by the U.S. National Science Foundation, MIT researchers reverse-engineered the on-chip interconnect to study how this kind of attack would be possible. Drawing on their discoveries, they built an analytical model of how traffic flows between the cores on a processor, which they used to design and launch surprisingly effective side-channel attacks. Then they developed two mitigation strategies that enable a user to improve security without making any physical changes to the computer chip.

 The research was presented at the USENIX Security Conference.

A lot of current side-channel defenses are ad hoc — we see a little bit of leakage here and we patch it. We hope our approach with this analytical model pushes more systematic and robust defenses that eliminate whole classes of attacks at the same time,” says co-lead author Miles Dai. Other authors are Riccardo Paccagnella, Miguel Gomez-Garcia, John McCalpin.

The processor model the researchers built summarizes how traffic can flow on the interconnect. The model shows which cores would be most vulnerable to a side-channel attack. A core would be more vulnerable if it can be accessed through many different lanes. An attacker could use this information to select the best core to monitor and steal information from a victim program.

If the attackers understand how the interconnect works, they can set themselves up so the execution of some sensitive code would be observable through interconnect contention,” says Paccagnella. “Then they can extract, bit by bit, some secret information, like a cryptographic key.”

When the researchers used this model to launch side-channel attacks, they were surprised by how quickly the attacks worked. They were able to recover full cryptographic keys from two different victim programs.

After studying these attacks, they used their analytical model to design two mitigation mechanisms. In the first strategy, the system administrator used the model to identify which cores are most vulnerable to attacks and then scheduled sensitive software to run on less vulnerable cores. For the second mitigation strategy, the administrator reserved cores located around a susceptible program and ran only trusted software on those cores.

The researchers found that both mitigation strategies were able to significantly reduce the accuracy of side-channel attacks. Neither requires the user to make any changes to the physical hardware, so the mitigations would be relatively easy to implement, Dai says.

Ultimately, they hope their work inspires more researchers to study the security of on-chip interconnects, Paccagnella says.

Leave a comment

Register for your own account so you may participate in comment discussion. Please read the Comment Guidelines before posting. By leaving a comment, you agree to abide by our Comment Guidelines, our Privacy Policy, and Terms of Use. Please stay on topic, be civil, and be brief. Names are displayed with all comments. Learn more about Joining our Web Community.